As integrated circuit line widths approach 10 nm and less, line-width roughness (LWR) control and its single-sided counterpart, line-edge roughness (LER) control, are increasingly important. I think one can readily justify the position that the three terms of the RLS triangle (feature Resolution, LER/LWR, resist Sensitivity) must be satisfied in the priority order given: R, L, S.
The Journal of Micro/Nanolithography, MEMS and MOEMS (JMM, for short) has put together an impressive Special Section[1] devoted to pattern roughness, local uniformity and stochastic defects. In this post I will highlight a few of the articles.
Mack[2] considers a stochastic model of resist exposure and development along with general observations about the smoothing characteristics of etch to conclude that lithographic processes should strive to reduce low-frequency roughness rather than overall “3σ” roughness. When combined with etch minimizing high-frequency roughness, one may obtain an optimal process.
Mass, et al.[3] build a stochastic model of metal-oxide cluster resists and recommend a cluster diameter of <1 nm to minimize roughness.
Naulleau and Gallatin[4] study typical chemically amplified resist (CAR) and conclude that stochastic terms attributable to materials are equally as important as those due to the photon source. Among the materials properties, quencher characteristics are surprisingly important, while photon absorptivity should be raised only while maintaining chemical yield.
Chen, et al.[5] experimentally show that while mask roughness contributions to wafer LWR are considerable, they are not as significant as resist stochastics for typical CAR materials and processes.
References:
[1] JMM 17(4) Oct-Dec 2018
[2] JMM 17(4), 041006 (7 August 2018)
[3] JMM 17(4), 041003 (11 July 2018)
[4] JMM 17(4), 041015 (4 October 2018)
[5] JMM 17(4), 041012 (17 September 2018)